Technical Field
The present invention relates to coded modulation, and more particularly, to generalized low-density parity-check (GLDPC) codes derived from multiple component codes suitable for ultra-high-speed serial optical transport networks.
Description of the Related Art
The 40/100 Gigabit Ethernet standard (e.g., IEEE 802.3ba) has recently been ratified, but there exists ever-increasing capacity demands (e.g., future Terabit per second Ethernet, TbE). As the operating symbol rates increase, the deteriorating effects of fiber nonlinearities and polarization-mode dispersion (PMD) reach levels that inhibit reliable communication over the optical fiber network. Thus solutions for 100 GbE and beyond need to attain ultra-high transmission speeds in terms of aggregate bit rates while keeping the operating symbol rates low to facilitate nonlinearity and polarization mode dispersion (PMD) management. This in return requires the use of modulation formats with high spectral efficiencies (SE).
However, as a signal constellation grows in size to increase its SE, so does the optical signal-to-noise ratio (OSNR) it requires to achieve a certain bit error ratio (BER) and this might jeopardize its use in practice, but when used in combination with strong forward error correction (FEC) codes, the OSNR requirement of the systems employing such high-SE modulation formats can be significantly lowered. Thus, methods that can combine modulation and coding (e.g., coded modulation methods), are useful in the design and implementation of high-speed optical communication systems. Furthermore, in the context of high-speed optical communication systems, not only the error correction performance but also the complexity of a coded modulation system plays a crucial role.
A key enabling technology for the next generation of optical transport is a soft-decision forward error correction (FEC). It has been shown that LDPC coded modulation based on large girth (e.g., ≧10) LDPC codes provide excellent bit error rate (BER) performance, but the codeword lengths are excessively long for quasi-cyclic (QC) LDPC code design, and corresponding decoders are difficult to implement with existing hardware, and girth-8 LDPC codes exhibit the error floor phenomenon. To eliminate the error floor phenomenon, an outer BCH/RS code has been traditionally used. By using this approach the error floor of girth-8 and girth-6 LDPC codes can be eliminated. However, the corresponding net coding gains (NCGs) are much below that of large-girth LDPC codes.